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 PD - 94868
IRFZ34VPBF
l l l l l l l l
Advanced Process Technology Ultra Low On-Resistance Dynamic dv/dt Rating 175C Operating Temperature Fast Switching Fully Avalanche Rated Optimized for SMPS Applications Lead-Free
HEXFET(R) Power MOSFET
D
VDSS = 60V RDS(on) = 28m
G S
ID = 30A
Advanced HEXFET(R) Power MOSFETs from International Rectifier utilize advanced processing techniques to achieve extremely low on-resistance per silicon area. This benefit, combined with the fast switching speed and ruggedized device design that HEXFET power MOSFETs are well known for, provides the designer with an extremely efficient and reliable device for use in a wide variety of applications. The TO-220 package is universally preferred for all commercial-industrial applications at power dissipation levels to approximately 50 watts. The low thermal resistance and low package cost of the TO-220 contribute to its wide acceptance throughout the industry.
Description
TO-220AB
Absolute Maximum Ratings
Parameter
ID @ TC = 25C ID @ TC = 100C IDM PD @TC = 25C VGS EAS IAR EAR dv/dt TJ TSTG Continuous Drain Current, VGS @ 10V Continuous Drain Current, VGS @ 10V Pulsed Drain Current Power Dissipation Linear Derating Factor Gate-to-Source Voltage Single Pulse Avalanche Energy Avalanche Current Repetitive Avalanche Energy Peak Diode Recovery dv/dt Operating Junction and Storage Temperature Range Soldering Temperature, for 10 seconds Mounting torque, 6-32 or M3 srew
Max.
30 21 120 70 0.46 20 81 30 7.0 4.5 -55 to + 175 300 (1.6mm from case ) 10 lbf*in (1.1N*m)
Units
A W W/C V mJ A mJ V/ns C
Thermal Resistance
Parameter
RJC RCS RJA Junction-to-Case Case-to-Sink, Flat, Greased Surface Junction-to-Ambient
Typ.
--- 0.50 ---
Max.
2.15 --- 62
Units
C/W
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1
12/04/03
IRFZ34VPBF
Electrical Characteristics @ TJ = 25C (unless otherwise specified)
V(BR)DSS
V(BR)DSS/TJ
RDS(on) VGS(th) gfs IDSS IGSS Qg Qgs Qgd td(on) tr td(off) tf LD LS Ciss Coss Crss
Parameter Drain-to-Source Breakdown Voltage Breakdown Voltage Temp. Coefficient Static Drain-to-Source On-Resistance Gate Threshold Voltage Forward Transconductance Drain-to-Source Leakage Current Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Total Gate Charge Gate-to-Source Charge Gate-to-Drain ("Miller") Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Internal Drain Inductance Internal Source Inductance Input Capacitance Output Capacitance Reverse Transfer Capacitance
Min. 60 --- --- 2.0 15 --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- ---
Typ. --- 0.062 --- --- --- --- --- --- --- --- --- --- 10 65 31 40 4.5 7.5 1120 250 59
Max. Units Conditions --- V VGS = 0V, ID = 250A --- V/C Reference to 25C, ID = 1mA 26 m VGS = 10V, ID = 18A 4.0 V VDS = VGS, ID = 250A --- S VDS = 25V, ID = 18A 25 VDS = 60V, VGS = 0V A 250 VDS = 48V, VGS = 0V, TJ = 150C 100 VGS = 20V nA -100 VGS = -20V 49 ID = 30A 12 nC VDS = 48V 18 VGS = 10V, See Fig. 6 and 13 --- VDD = 30V --- ID = 30A ns --- RG = 12 --- VGS = 10V, See Fig. 10 Between lead, --- 6mm (0.25in.) nH G from package --- and center of die contact --- VGS = 0V --- VDS = 25V --- pF = 1.0MHz, See Fig. 5
D
S
Source-Drain Ratings and Characteristics
IS
ISM
VSD trr Qrr ton Notes:
Parameter Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode) Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge Forward Turn-On Time
Min. Typ. Max. Units
Conditions D MOSFET symbol 30 --- --- showing the A G integral reverse --- --- 120 S p-n junction diode. --- --- 1.6 V TJ = 25C, IS = 30A, VGS = 0V --- 70 110 ns TJ = 25C, IF = 30A --- 99 150 nC di/dt = 100A/s Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Repetitive rating; pulse width limited by Starting TJ = 25C, L = 180H
max. junction temperature. ( See fig. 11 ) RG = 25, IAS = 30A. (See Figure 12)
ISD 30A, di/dt 250A/s, VDD V(BR)DSS,
TJ 175C
Pulse width 400s; duty cycle 2%.
2
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IRFZ34VPBF
1000
VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.5V TOP
1000
I D , Drain-to-Source Current (A)
100
I D , Drain-to-Source Current (A)
100
VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.5V TOP
10
10
4.5V
4.5V
20s PULSE WIDTH TJ = 25 C
1 10 100
1 0.1
1 0.1
20s PULSE WIDTH TJ = 175 C
1 10 100
VDS , Drain-to-Source Voltage (V)
VDS , Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
1000
3.5
RDS(on) , Drain-to-Source On Resistance (Normalized)
ID = 30A
I D , Drain-to-Source Current (A)
3.0 2.5 2.0 1.5 1.0 0.5 0.0 -60 -40 -20 0
TJ = 25 C TJ = 175 C
100
10
1
V DS = 50V 20s PULSE WIDTH 4 5 6 7 8 9 10 11
VGS = 10V
20 40 60 80 100 120 140 160 180
VGS , Gate-to-Source Voltage (V)
TJ , Junction Temperature ( C)
Fig 3. Typical Transfer Characteristics
Fig 4. Normalized On-Resistance Vs. Temperature
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IRFZ34VPBF
2000
VGS , Gate-to-Source Voltage (V)
1600
VGS = 0V, f = 1MHz Ciss = Cgs + Cgd , Cds SHORTED Crss = Cgd Coss = Cds + Cgd
20
ID = 30A VDS = 48V VDS = 30V VDS = 12V
16
C, Capacitance (pF)
1200
Ciss
12
800
8
400
Coss Crss
4
0
1
10
100
0
FOR TEST CIRCUIT SEE FIGURE 13
0 10 20 30 40 50
VDS , Drain-to-Source Voltage (V)
QG , Total Gate Charge (nC)
Fig 5. Typical Capacitance Vs. Drain-to-Source Voltage
Fig 6. Typical Gate Charge Vs. Gate-to-Source Voltage
1000
1000
ISD , Reverse Drain Current (A)
OPERATION IN THIS AREA LIMITED BY RDS(on)
TJ = 175 C
10
ID , Drain Current (A)
100
100
10us
100us 10 1ms
TJ = 25 C
1
0.1 0.0
V GS = 0 V
0.4 0.8 1.2 1.6 2.0
1
TC = 25 C TJ = 175 C Single Pulse
1 10
10ms 100 1000
VSD ,Source-to-Drain Voltage (V)
VDS , Drain-to-Source Voltage (V)
Fig 7. Typical Source-Drain Diode Forward Voltage
Fig 8. Maximum Safe Operating Area
4
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IRFZ34VPBF
30
VDS
25
RD
VGS RG
D.U.T.
+
ID , Drain Current (A)
20
-VDD
15
10V
Pulse Width 1 s Duty Factor 0.1 %
10
Fig 10a. Switching Time Test Circuit
VDS 90%
5
0
25
50
TC , Case Temperature ( C)
75
100
125
150
175
Fig 9. Maximum Drain Current Vs. Case Temperature
10% VGS
td(on) tr t d(off) tf
Fig 10b. Switching Time Waveforms
10
Thermal Response (Z thJC )
1
D = 0.50 0.20 0.10 0.05 PDM SINGLE PULSE (THERMAL RESPONSE) t1 t2 Notes: 1. Duty factor D = t 1 / t 2 2. Peak T J = P DM x Z thJC + TC 0.0001 0.001 0.01 0.1
0.1
0.02 0.01
0.01 0.00001
t1 , Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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5
IRFZ34VPBF
15V
EAS , Single Pulse Avalanche Energy (mJ)
160
TOP
120
VDS
L
DRIVER
BOTTOM
ID 12A 21A 30A
RG
20V
D.U.T
IAS tp
+ V - DD
A
80
0.01
Fig 12a. Unclamped Inductive Test Circuit
V(BR)DSS tp
40
0
25
50
75
100
125
150
175
Starting TJ , Junction Temperature ( C)
Fig 12c. Maximum Avalanche Energy Vs. Drain Current
I AS
Fig 12b. Unclamped Inductive Waveforms
Current Regulator Same Type as D.U.T.
50K
QG
12V
.2F .3F
10 V
QGS VG QGD
VGS
3mA
D.U.T.
+ V - DS
Charge
IG
ID
Current Sampling Resistors
Fig 13a. Basic Gate Charge Waveform
Fig 13b. Gate Charge Test Circuit
6
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IRFZ34VPBF
Peak Diode Recovery dv/dt Test Circuit
D.U.T*
+
+
Circuit Layout Considerations * Low Stray Inductance * Ground Plane * Low Leakage Inductance Current Transformer
-
+
RG VGS * dv/dt controlled by RG * ISD controlled by Duty Factor "D" * D.U.T. - Device Under Test
+ VDD
*
Reverse Polarity of D.U.T for P-Channel
Driver Gate Drive P.W. Period D=
P.W. Period
[VGS=10V ] ***
D.U.T. ISD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt
[VDD]
Re-Applied Voltage Inductor Curent
Body Diode
Forward Drop
Ripple 5%
[ISD ]
*** VGS = 5.0V for Logic Level and 3V Drive Devices Fig 14. For N-channel HEXFET(R) power MOSFETs
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7
IRFZ34VPBF
TO-220AB Package Outline
2.87 (.113) 2.62 (.103) 10.54 (.415) 10.29 (.405) 3.78 (.149) 3.54 (.139) -A6.47 (.255) 6.10 (.240)
Dimensions are shown in millimeters (inches)
-B4.69 (.185) 4.20 (.165) 1.32 (.052) 1.22 (.048)
4 15.24 (.600) 14.84 (.584)
1.15 (.045) MIN 1 2 3
LEAD ASSIGNMENTS IGBTs, CoPACK 1 - GATE 21- GATE DRAIN 1- GATE 32- DRAINSOURCE 2- COLLECTOR 3- SOURCE 3- EMITTER 4 - DRAIN
LEAD ASSIGNMENTS
HEXFET
14.09 (.555) 13.47 (.530)
4- DRAIN
4.06 (.160) 3.55 (.140)
4- COLLECTOR
3X 3X 1.40 (.055) 1.15 (.045)
0.93 (.037) 0.69 (.027) M BAM
3X
0.55 (.022) 0.46 (.018)
0.36 (.014)
2.54 (.100) 2X NOTES: 1 DIMENSIONING & TOLERANCING PER ANSI Y14.5M, 1982. 2 CONTROLLING DIMENSION : INCH
2.92 (.115) 2.64 (.104)
3 OUTLINE CONFORMS TO JEDEC OUTLINE TO-220AB. 4 HEATSINK & LEAD MEASUREMENTS DO NOT INCLUDE BURRS.
TO-220AB Part Marking Information
E XAMPL E : T HIS IS AN IR F 1010 LOT CODE 1789 AS S E MB L E D ON WW 19, 1997 IN T H E AS S E MB LY L INE "C" INT E R NAT IONAL R E CT IF IE R L OGO AS S E MB L Y LOT CODE PAR T NU MB E R
Note: "P" in assembly line position indicates "Lead-Free"
DAT E CODE YE AR 7 = 1997 WE E K 19 L INE C
Data and specifications subject to change without notice.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information.12/03
8
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